Addressing Modes

Addressing Modes

What are Addressing Modes?

Addressing modes define how the CPU locates the operands (data) needed for an instruction. They specify the method used to access data in registers, memory, or constants during instruction execution.

Why Addressing Modes are Important

• Flexibility: Allow instructions to access data in various ways (e.g., directly, indirectly, or via calculations).

• Efficiency: Optimize memory usage and execution speed by choosing the best mode.

• Core to CPU Design: Essential for instruction set architecture (ISA) and program execution.

12 Common Addressing Modes

Below are the 12 widely recognized addressing modes, with explanations and examples:

1. Immediate Mode:

   • Description: The operand is a constant value embedded in the instruction.

   • Example: ADD R1, #5 → Add 5 directly to R1.

   • Use: Quick for fixed values, no memory access.

2. Direct (Absolute) Mode:

   • Description: The operand is at a specific memory address given in the instruction.

   • Example: LOAD R1, 1000 → Load value from memory address 1000 into R1.

   • Use: Access known memory locations.

3. Indirect Mode:

   • Description: The instruction contains the address of a memory location that holds the operand’s address.

   • Example: LOAD R1, (1000) → Memory[1000] contains address (e.g., 2000), load value from Memory[2000].

   • Use: Useful for pointers or dynamic addressing.

4. Register Mode:

   • Description: The operand is in a CPU register.

   • Example: ADD R1, R2 → Add contents of R2 to R1.

   • Use: Fast, as registers are inside CPU.

5. Register Indirect Mode:

   • Description: The register contains the address of the operand in memory.

   • Example: LOAD R1, (R2) → R2 holds address (e.g., 3000), load value from Memory[3000].

   • Use: Common for arrays or linked lists.

6. Indexed Mode:

   • Description: The effective address is calculated by adding an offset to a base address (often in a register).

   • Example: LOAD R1, 100(R2) → Add 100 to R2’s value to get address, load from there.

   • Use: Accessing array elements.

7. Base-Register Mode:

   • Description: Similar to indexed, but uses a base register plus a displacement for addressing.

   • Example: LOAD R1, R3+50 → R3 holds base address, add 50 to get operand address.

   • Use: For structured data like records.

8. Relative Mode:

   • Description: The address is calculated relative to the Program Counter (PC) plus an offset.

   • Example: JUMP +10 → Jump to PC + 10.

   • Use: For branching in loops or conditionals.

9. Autoincrement Mode:

   • Description: Register holds address; after accessing operand, register is incremented.

   • Example: LOAD R1, (R2)+ → Load from address in R2, then increment R2.

   • Use: Sequential memory access (e.g., stacks, arrays).

10. Autodecrement Mode:

    • Description: Register is decremented before accessing the operand at its address.

    • Example: STORE R1, -(R2) → Decrement R2, store R1 at new address.

    • Use: Stack operations or reverse traversal.

11. Implied (Inherent) Mode:

    • Description: Operand is implied by the instruction, no explicit address needed.

    • Example: NOP → No operand; performs no operation.

    • Use: For instructions with fixed behavior (e.g., HALT, CLEAR).

12. Stack Mode:

    • Description: Operands are accessed from a stack (top of stack via Stack Pointer).

    • Example: PUSH R1 → Push R1’s value onto stack.

    • Use: For function calls and recursion.

Example Breakdown

Instruction: ADD R1, 100(R2) (Indexed Mode)

• Decode: ADD operation, R1 as destination, operand at address (R2 + 100).

• Execute: Fetch value from memory at (R2 + 100), add to R1, store result in R1.

• Use Case: Accessing an array element where R2 is the base address.

Where Addressing Modes are Used

• Instruction Execution: Determine how operands are fetched for ALU or memory operations.

• Program Optimization: Choose modes to minimize memory access or instruction size.

• Compiler Design: Compilers select addressing modes to generate efficient machine code.

• ISA Design: Define how a CPU supports various data access patterns.

Why Addressing Modes Matter in COA

• Versatility: Enable programs to handle complex data structures (e.g., arrays, pointers).

• Performance: Reduce memory accesses by using registers or immediate values.

• Code Efficiency: Compact instructions with flexible addressing save memory.

• Hardware Design: Influence control unit and datapath complexity.

Additional Insights

• Mode Selection: Depends on instruction type, data location, and performance needs.

• Trade-Offs:

  • Immediate/Implied: Fast but limited to constants or fixed operations.

  • Indirect/Indexed: Flexible but slower due to memory access.

• Modern CPUs: Combine multiple modes (e.g., x86 supports complex addressing).

• Limitations: More modes increase CPU complexity, potentially slowing decoding.

Summary Table

Addressing Mode	Description	Example
Immediate	Constant in instruction	ADD R1, #5
Direct	Specific memory address	LOAD R1, 1000
Indirect	Address of address	LOAD R1, (1000)
Register	Operand in register	ADD R1, R2
Register Indirect	Register holds address	LOAD **Example**: LOAD R1, (R2)`
Indexed	Base + offset	LOAD R1, 100(R2)
Base-Register	Base register + displacement	LOAD R1, R3+50
Relative	PC + offset	JUMP +10
Autoincrement	Access, then increment register	LOAD R1, (R2)+
Autodecrement	Decrement, then access	STORE R1, -(R2)
Implied	No explicit operand	NOP
Stack	Access via stack pointer	PUSH R1